The SC111, Z180 CPU module includes the CPU, two FTDI style asynchronous 5-volt serial ports, a clock oscillator, a reset circuit, and a header for access to the Z180’s clocked (synchronous) serial port.
To create a minimal computer system, a Z180 compatibile memory module must be added, together with a backplane to connect the two modules.
C1 to C5
These capacitors provide power supply decoupling (or bypass). The fast switching in digital circuits creates spikes on the power supply lines which are suppressed with decoupling capacitors placed at key points on the circuit board.
This capacitor is required by the Voltage Supervisor and Reset device (DS1233-5+, U2) when an external reset switch and pull-up resistor are connected to the reset line. See DS1233-5+ datasheet for more details.
JP1 and JP2
Fitting jumper shunts to these headers connects the FTDI style 5 volts serial port’s power pin to SC111’s 5 volt supply. This enables the Z180 system to be powered from the serial port, or a device connected to the serial port to be powered from SC111.
Do not attempt to power the Z180 system from two different sources. If the Z180 system is not being powered from a serial port, then only fit a jumper shunt to JP1 or JP2 if the serial device is being powered from the system.
JP3, 4, 5 and 6
These jumpers allow the serial port transmit and receive signals to be connected to the RC2014 bus.
JP7 and JP8
The Z180 CPU has the option of clocking its serial ports from a separate clock source. To use this feature, fit oscillator X2, jumper shunts to JP7 and/or JP8, and run appropriate software. This feature requires significant effort, so study the datasheets before trying this.
The Z180’s serial port A has a DCD input which is pulled up by resistor network RP1. Jumper header JP9 can be used to connect a signal to this input or to ground the signal with a jumper shunt.
Some versions of the Z180 require the DCD input to be low for the serial port to work correctly. Other versions allow the serial port to operate with the DCD input either high or low. In the latter case, this pin can be read in software making in a general purpose input. To allow for all versions of the Z180 a jumper shunt should be fitted to JP9, pulling the DCD input low.
JP10 enables the Z180’s interrupt 1 signal (INT1) to be connected to pin 37 (USER 1) of the RC2014 bus. With appropriate software this allows the Z180 to respond to interrupts from external devices.
This is the RC2014 bus connector.
P2 and P3
Serial ports A and B are connected via P2 and P3. These are FTDI style 5 volt serial ports. Port A includes RTS/CTS flow control signals, while port B does not.
|2||Request To Send (RTS) output from Z180|
|4||Recieve Data (RxD) input to Z180|
|5||Transmit Data (TxD) output from Z180|
|6||Clear To Send (CTS) input to Z180|
The header P4 is primarily to provide access to the Z180’s clocked (synchronous) serial port.
R1 to R6
These provide current limiting between the Z180 system and the serial device, providing protection for when one is powered and the other is not.
R7 to R9
The resistors provide pull up and pull down for the serial port inputs, thus holding them in known states when no device is connected.
This resistor pack/network pulls up signals, such as the interrupt line. All signals requiring to default to a high level are pulled up with resistors.
This is a 68-pin PLCC packaged Z8S180 CPU. It must be rated at a frequency at least as high as the clock signal PHI.
PHI is initially the on-board oscillator (X1) frequency divided by 2, as the Z180 turns on its clock divider on at reset. However, current firmware turns this off, so PHI is then equal to the on-board oscillator (X1) frequency. It is possible for software to enable the Z180’s clock multiplier, so that PHI is twice the on-board oscillator (X1) frequency.
SC111 is typically fitted with an 18.432 MHz oscillator, so a 20 MHz Z180 is required. With a 33 MHz Z180, it may be possible to run the system with the clock multiplier on, thus overclocking the Z180 to 36.864 MHz. But only may be!
This is a DS1233-5+ voltage supervisor and reset device. It provides a clean, reliable reset for the Z180 system. The device pulls the system’s reset signal low when the supply voltage is less than about 4.5 volts. If your system does not run, check the supply voltage and the reset signal.
The reset line can also be pulled down by a reset button. The DS1233 senses this and pulls its own output low to provide a clean reset pulse. This eliminates the typical switch bounce that could lead to reliability problems.
This oscillator provides the CPU’s main clock. With existing firmware this oscillator is also used as a clock source for the serial ports. Typically this oscillator is 18.432 MHz. This is the frequency required when running the module in native Z180 mode with the Small Computer Monitor configuration S5. When running in Z80 compatibility mode, with SCM S4, a 7.3728 MHz oscillator may be required for maximum compatibility.
An optional second oscillator can be used to clock the Z180’s serial ports. This requires appropriate software.