Prototyping with SC512 can be either using SC512 to breakout signals to a solderless breadboard (with Dupont wires) or to create a stand-alone prototype with components mounted on the matrix area of the card.

This card includes flexible address decoding, with each address bit (A1 to A7) matching the conditions set with jumpers JP1 to JP7. The required state of the Z80 M1 signal is set with JP8. Note that A0 is not included in the address decoding, so the minimum number of I/O addresses occupied by the card is two addresses.

In each case, the required condition of each signal can be high (1), low (0), or don’t care (1 or 0). This provides very flexible address decoding and even allows you to create ghost addresses, which are common when compromised address decode is to be used by a design.

The illustration below shows the jumper shunt positions for address decoding of a device that occupies the address range 0x20 to 0x27. The required address bits for this range are:
A7=0, A6=0, A5=1, A4=0, A3=0, A2=0 or 1, A1=0 or 1, A0=0 or 1

To select a ‘0’ as the required state of an address bit, fit a jumper shunt to position “0” for that signal. For a ‘1’ fit the shunt to position “1”. If the signal can be in either state, fit a jumper shunt in the “don’t care” (middle) position.

In this example, we have set the required state of the M1 signal to “1”. This is the usual state required by I/O devices unless the device is a Z80 family IC, such as a Z80 PIO, or the address decoding also includes the RD or WR signal. This requirement is to stop a device from being enabled during a Z80 interrupt acknowledge cycle.

Note that A0 is always set as “don’t care”.

This card generates a device enable signal (/IOEnable), a read from the device signal (/IORead), and a write to the device signal (/IOWrite). It also generates an interrupt acknowledge signal (/IntAck). All these signals are available on pin header, P4.

All the Z50Bus signals are available on either P2 or P3,