The SC125, serial and timer card houses a Z80 SIO chip, which provides two TTL serial ports for use with FTDI style serial adapter cables, and a Z80 CTC, which has four counter/timer channels.
C1 to C6 (100 nF)
These capacitors provide power supply decoupling (or bypass). The fast switching in digital circuits creates spikes on the power supply lines which are suppressed with decoupling capacitors placed at key points on the circuit board.
JP1 and JP2
Fitting jumper shunts to these headers connects the FTDI style 5 volts serial port’s power pin to SC125’s 5 volt supply. This enables the retro computer system to be powered from the serial port, or a device connected to the serial port to be powered from SC125.
Do not attempt to power the system from two different sources. If the system is not being powered from a serial port, then only fit a jumper shunt to JP1 or JP2 if the serial device is being powered from the system.
JP3 and JP4
These jumpers enable one of the serial ports to be connected to the Z50Bus RX and TX lines. Each jumper has two positions: A and B. Position A links the port A signals to the bus, while position B is for the port B signals. Leave the jumper shunts off to isolate this card’s RXD and TXD signals from the Z50Bus.
JP5 and JP6
These jumpers allow the address ranges of the SIO and CTC chips to each be set to one of two options. Each chip occupies four I/O addreses. The addresses should be set to either:
- Primary: SIO = 0x80 to 0x83, CTC 0x88 to 0x8B
- Secondary: SIO = 0x84 to 0x87, CTC 0x8C to 0x8F
The primary addresses are the default supported by the current firmware. A second card can be added to the system with the secondary addresses selected, but there is not currently any software to support this.
This is the Z50Bus connector.
P2 and P3
Serial ports A and B are connected via P2 and P3. These are FTDI style 5 volt serial ports.
|2||Request To Send (RTS) output from the card|
|4||Recieve Data (RxD) input to the card|
|5||Transmit Data (TxD) output from the card|
|6||Clear To Send (CTS) input to the card|
R1 to R8 (2k2)
These provide current limiting between the SC125 serial card and the connected serial device (eg. PC or terminal), providing protection for when one is powered and the other is not.
R9 to R12 (100k)
The resistors provide pull up and pull down for the serial port inputs, thus holding them in known states when no device is connected.
This provides a pull-up for the Z80 interrupt daisy chain signal IEI. This is needed to ensure this card can generate interrupts when this input is not connected to a valid IEO signal.
Most simple Z50Bus systems will not have multiple cards using Z80 mode 2 interrupts. By pulling this input high via a resistor it avoids the need to consider the daisy-chain when fitting cards to a backplane, whilst allowing a full mode 2 implementation when required.
The 74HCT138 provides address decoding for both the SIO and the CTC chips.
U2 (Z80 SIO)
The Z80 SIO is a dual channel serial interface.
For full details search for Z84C40 datasheet or the Zilog Z80 Family CPU Peripherals User Manual (UM0081).
The 74HCT08 provides a very basic interrupt look-ahead function. This reduces the time it takes for the daisy-chain to stabilise, allowing more devices in the chain.
U4 (Z80 CTC)
The Z80 CTC is a four channel counter/timer interface. The channels are used as follows:
- Channel 0: Serial port A baud rate clock
- Channel 1: Serial port B baud rate clock
- Channel 2 and 3: Clock tick generator/timer
The output of channel 2 is connected to the input of channel 3. This makes of a flexible clock tick generator or timer.
For full details search for Z84C30 datasheet or the Zilog Z80 Family CPU Peripherals User Manual (UM0081).
X1 (1.8432 MHz)
This oscillator a clock source for the CTC which is independent of the CPU’s main clock. The CTC uses this to generate baud rate clocks for the SIO and a flexible timer.
By removing the oscillator and linking the oscillator socket’s pins 5 and 6, the CPU clock can be used as the CTC clock source. This will, however, need matching software.