This RC2014 compatible module contains a Z80 PIO (parallel input output) chip and is designed to be very flexible, with full access to the PIO’s hardware functions via header pins.

Address Decoding

The PIO is an I/O devices occupying a block of 4 I/O addresses. The base address of this block is set with DIP switches. These allow selection of any I/O address on a 4 byte boundary.

C1 to C4

These capacitors provide power supply decoupling (or bypass). The fast switching in digital circuits creates spikes on the power supply lines which are suppressed with decoupling capacitors placed at key points on the circuit board.

C5

This capacitor provides suppression of transients on the power supply. The PIO module may well be used to power and control external electronics, in which case there could be significant transients generated on the supply lines. Where possible supply transients should be suppressed at source, so this component should not be critical.

The PCB allows for a radial or axial capacitors. In order to build a low profile board, the capacitor should lay on its side. An axial capacitor would be most secure in this configuration, but there is limited length allocated and you probably don’t have one!

JP1 and JP2

This pair of jumpers allow the interrupt daisy chain signals to be connected to the RC2014 bus signal USER 2 (pin 38) and USER 3 (pin 39). To make use of this feature you must use a backplane that is specifically designed to provide the necessary daisy chain, such as Backplane SC107. The current official RC2014 backplanes do not support this feature.

Alternatively the signals IEI and IEO can be found on connector P4 on the back edge of the board. Dupont wires can be used to daisy chain these signals to other modules.

P1

This connector mates with the RC2014 bus backplane. You can fit a single or a double row header. The only reasons for the second row is to provide additional power supply pins, make the module the same height as the others and to increase stability of the module.

P2

This connector provides access to all the PIO I/O signals in a format suitable to connect to external devices via a ribbon cable. See schematic for pin-out.

P3

This connector provides access to all the PIO I/O signals in a format suitable to connect to breadboards and other prototyping projects via Dupont wires.

This connector is optional, so if you want to put the RC2014 in a case or just don’t like the look of it, you can leave this connector off. Alternatively you might prefer a different connector, such as a female header socket.

Pin 15 is a ground terminal between the two port I/O connections. You may wish to remove this pin before assembly, so that it is easier to visually identify required connections. See schematic for pin-out.

P4

As the official RC2014 backplanes do not provide a Z80 mode 2 interrupt daisy chain (IEI and IEO signals), these have been brought to the back of the board where they can be easily linked to other modules with Dupont wires.

RP1

This is a network of 8 resistors with one end of each resistor common to pin 1. The resistors are used to pull up the address select switch (SW1) outputs and also to pull up the interrupt enable input signal (IEI).

SW1

This switch is used to set the I/O address for the module. It sets the required state of address lines A2 to A7, thus allowing the module to occupy a 4 address block on any 4-byte boundary.

In order to provide some certainty for software it is strongly recommended you set the base address of your first PIO module to 0x68, so that the module occupies I/O addresses 0x68 to 0x6B. This is done by setting switches 1 to 6, to On, Off, Off, On, Off, On where On is the switch closed. In the case of the piano style DIP switch, the On position is the switch lever pushed down towards the circuit board.

Switches in the On position pull down the input of the address comparator U1. Switches in the Off position allow the input of the address comparator to be pulled up by RP1.

U1

This integrated circuit provides the address decoding, by comparing the current I/O address from the CPU with the address set with the DIP switch SW1.

U2

The Z80 PIO provides provides two 8-bit parallel ports with handshaking and flexible interrupt functions. It has mode 2 interrupt support, making it a usual general purpose I/O chip for use in an expanded Z80 system.

For further details see the Zilog PIO data sheet.

U3

This integrated circuit provides a special reset signal to the PIO. There is no separate reset pin on the PIO, so instead the M1 pin has an extra function. When M1 is low and both RD and IORQ are high, the PIO enters a reset state.