This RC2014 compatible module contains a Z80 CTC (counter timer channels) chip and is designed to be very flexible, with full access to the CTC’s hardware functions via header pins.

Address Decoding

The CTC is an I/O devices occupying a block of 4 I/O addresses. The base address of this block is set with DIP switches. These allow selection of any I/O address on a 4 byte boundary.

C1 to C4

These capacitors provide power supply decoupling (or bypass). The fast switching in digital circuits creates spikes on the power supply lines which are suppressed with decoupling capacitors placed at key points on the circuit board.

JP1 and JP2

This pair of jumpers allow the interrupt daisy chain signals to be connected to the RC2014 bus signal USER 2 (pin 38) and USER 3 (pin 39). To make use of this feature you must use a backplane that is specifically designed to provide the necessary daisy chain, such as Backplane SC107. The current official RC2014 backplanes do not support this feature.

Alternatively the signals IEI and IEO can be found on connector P2 on the back edge of the board. Dupont wires can be used to daisy chain these signals to other modules.

JP3 to JP6

JP3 to JP6 allow the source for each CTC input to be set to any of:

• RC2014 bus primary clock (CLK)
• RC2014 bus secondary clock (CLK2)
• This module’s on-board oscillator clock signal (CLKX)
• RC2014 bus USER pin (USER 4, 5, 6, 1 for CTC inputs 0, 1, 2, 3)

Without a jumper shunt fitted the input is from a pin on connector P3 on the back edge of the board.

JP7

JP7 allows the module to supply a clock signal to the RC2014 bus secondary clock (CLK2). The possible signal sources are:

• CTC channel 0 output (ZT0)
• CTC channel 1 output (ZT1)
• CTC channel 2 output (ZT2)
• This module’s on-board oscillator clock signal (CLKX)

P1

This connector mates with the RC2014 bus backplane. You can fit a single or a double row header, but the full functionality of this module requires the extended RC2014 bus and thus a double row header.

P2

As the official RC2014 backplanes do not provide a Z80 mode 2 interrupt daisy chain (IEI and IEO signals), these have been brought to the back of the board where they can be easily linked to other modules with Dupont wires.

P3

This connector brings power, oscillator output, CTC inputs and CTC outputs, to the back of the PCB. This makes it easy to connect via Dupont wires to other cards or to breadboards.

This connector also allows a simple jumper shunt to connect the output of one CTC channel to the input of the next, thus allowing channels to be cascaded for greater range.

R1 to R4

These resistors provide pull-ups for the CTC inputs so that they do not float up and down in the event a jumper is left off.

Version 1.0 of the schematic and PCB label these as 100k, but it was found that if all four inputs were set to the RC2014 bus primary clock (CLK) the system would become unreliable. The value has therefore changed to 470k to reduce loading of the clock signal.

RP1

This is a network of 8 resistors with one end of each resistor common to pin 1. The resistors are used to pull up the address select switch (SW1) outputs and also to pull up the interrupt enable input signal (IEI).

SW1

This switch is used to set the I/O address for the module. It sets the required state of address lines A2 to A7, thus allowing the module to occupy a 4 address block on any 4-byte boundary.

In order to provide some certainty for software it is strongly recommended you set the base address of your first CTC module to 0x88, so that the module occupies I/O addresses 0x88 to 0x8B. This is done by setting switches 1 to 6, to Off, On, On, On, Off, On, where On is the switch closed. In the case of the piano style DIP switch, the On position is the switch lever pushed down towards the circuit board.

Switches in the On position pull down the input of the address comparator U1. Switches in the Off position allow the input of the address comparator to be pulled up by RP1.

U1

This integrated circuit provides the address decoding, by comparing the current I/O address from the CPU with the address set with the DIP switch SW1.

U2

The Z80 CTC provides a four channel programmable counter/timer.

All four channels have an external clock/trigger input, and the first three channels have a zero count/time-out output. All of these signals are available on connector P3 on the back edge of the board.

Each counter/timer channel can be started as a timer by an external trigger signal on the channel’s input.

Each counter/timer channel can count down from a pre-set value, each time the selected edge (rising or falling) occurs on its input. When the counter reaches zero the counter is automatically reloaded and an optional interrupt generated.

Feeding a clock signal to a CTC channel input enables the CTC to generate a periodic tick signal and/or interrupt. Jumper options allow each channel to be optionally supplied with a clock signal from one of these sources:

• RC2014 bus primary clock (CLK)
• RC2014 bus secondary clock (CLK2)
• The CTC’s on-board oscillator output (CLKX)
• RC2014 bus USER pin (USER 5, 6, 7, 1 for CTC channels 0 to 3)
• An external signal from connector P3

The first three channels can each act as a baud rate generator by generating a periodic output at the required frequency, as described in the User Guide.

By pre-setting a channel’s counter to 1 the CTC can generate a Z80 mode 2 interrupt each time the selected edge occurs on the channel’s input. This allows the CTC to act as a four channel Z80 mode 2 interrupt controller for non-Z80 devices.

For further details see the Zilog CTC data sheet.

X1

This oscillator is optional. If fitted it can perform a number of functions:

• Source for the RC2014 primary bus clock (CLK)
• Source for the RC2014 secondary bus clock (CLK2)
• Source for any or all of the CTC clock inputs

The assumption is that a 7.3728 MHz oscillator is used. By using this value the board will match the frequency expected by software designed for this board. It will also enable the oscillator to be useful as a source for the RC2014 bus clocks CLK and CLK2, which are usually 7.3728 MHz.

If this oscillator is not fitted, the board can be configured with jumpers to use either of the RC2014 bus clocks as a source for any or all of the CTC inputs.